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Powering down an AI future

Global technology equities Portfolio Manager Richard Clode discusses how the power of innovation in the tech sector is rising up to meet the AI power challenge.

Richard Clode, CFA

Richard Clode, CFA

Portfolio Manager


25 Nov 2024
4 minute read

Key takeaways:

  • The new iPhone is a lead indicator of future trends with a renewed focus on power efficiency because of AI’s intensive processing demands. Data centres are also harnessing technologies that were the preserve of smartphones to lower power.
  • Among the power-saving technologies being introduced are OLED display technology, lower-power Arm processors, and NAND flash storage.
  • Innovation is accelerating to flatten the AI power curve, creating significant investment opportunities, as well as enabling a more sustainable future.

The launch of the iPhone 16 in September this year focused on the unveiling of Apple Intelligence, a suite of AI features. However, a less well-highlighted feature was that for the first time since 2021, Apple designed a new processor for both the Pro (premium) and non-Pro models. For the past three years, if you bought a new non-Pro iPhone it would have the processor from the prior year due to Moore’s Law challenges, and the rising cost of the latest semiconductor manufacturing processes. However, this year, the launch of Apple’s generative AI suite necessitated that tech giant harness the very latest semiconductor technology for all its new iPhones to address the higher energy consumption challenges of powering AI.

Apple’s innovation sets the pace

This is an important inflection as where the iPhone goes, other edge devices (that use applications needing real-time processing and storage) have tended to follow. Many of the advances in the iPhone over the years are now making their way into data centres given the greater emphasis on power saving – something that has always been of paramount importance to mobile devices given battery life constraints. This highlights an attractive, broadening investment opportunity to meet the power challenges of an AI world.

A broad upgrade cycle of edge devices is underway

We are now at the start of a major upgrade cycle of edge devices to prepare us for future AI copilots (AI-enabled assistants). In smartphones, processor roadmaps are targeting more processing power notably around the neural processing units for AI, harnessing technologies such as gate-all-around (GAA) transistors, advanced packaging techniques such as thermal compression, and hybrid bonding to achieve this performance upgrade within the constraints of silicon ‘real estate’ in the phone as well as battery life.

The new iPad, launched earlier this year, introduced Organic Light-Emitting Diode (OLED) displays for the first time, a technology that has been used in the iPhone for many years. Displays are the largest single power consumer of an edge device. Historically, (liquid crystal) LCD displays used a power-hungry backlight unit but OLED displays use naturally phosphorescent materials to generate light, saving a significant amount of power. That frees up battery life to support the greater processing power required for Apple Intelligence.

Lower power processors designed by Arm have been used in the iPhone since the very beginning. Now we are seeing those Arm processors come to laptops as we enter an upgrade cycle to enable AI copilots. Apple already switched from legacy Intel x86 processors to Arm for MacBooks several years ago. The rest of the industry is following suit as they seek to meet the performance specifications set by Microsoft Copilot without compromising on battery life. Further, the new Qualcomm Snapdragon Elite X processors promise the tantalising prospect of allowing you to leave your laptop charger at home by helping extend battery life.

Smartphone advances are shifting to data centres

Similar trends are occurring in data centres. Legacy x86 processors are also being replaced by lower power Arm processors, a trend inflecting with the introduction of NVIDIA’s Grace Blackwell this year, as well as the custom Arm processors being designed by hyperscalers such as Amazon Graviton and Google Axiom. The iPhone’s storage uses NAND flash rather than the traditional hard disc drives used in a data centre. NAND flash has no moving parts unlike a hard disk drive, which has a spinning disc motor, enabling lower power. AI data centres are now transitioning to NAND flash-based storage and All-Flash arrays to harness their superior performance and lower power requirements. Networking is another major power drain in AI data centres given exponentially more data throughput. Fortunately, the latest Broadcom Tomahawk 5 switch uses around 95% less power than the first generation introduced a decade ago.

Opportunities in the tech sector’s power challenges

We are embarking on a major acceleration of innovation to meet the power challenges of an AI future. While there will undoubtedly be risks, there will also be ample investment opportunities thanks to tech innovation to help flatten the curve of power consumption in years to come, providing sustainability benefits as well.

Our ESG integration approach: Thoughtful, practical, research-driven and forward-looking.

AI copilot: an intelligent virtual assistant that leverages large language models (LLMs) to facilitate natural, human-like conversational interactions, supporting users in a wide variety of tasks.

Edge device: computing devices near the network’s edge, usually near data sources or consumers, which are key in real-time applications and Internet of Things (IoT) deployments.

Gate-all-around transistor: GAA technology is a new semi manufacturing process technology that can help continue silicon scaling, enabling transistors are able to carry more current while staying relatively small.

Hybrid bonding: also known as heterogeneous integration, helps semiconductor companies combine chiplets based on a variety of functions, technology nodes and sizes in advanced packages, enabling the combination to perform as a single product. The ability to shrink transistors with classic 2D scaling is slowing and becoming more expensive—hybrid bonding solves this industry challenge.

Moore’s Law challenge: refers to the long-held notion that the processing power of computers increases exponentially every couple of years has hit its limit. As the scale of chip components gets increasingly closer to that of individual atoms, it is now more expensive and more technically difficult to double the number of transistors and as a result the processing power for a given chip every two years.